Authors: Mu-Pai Lee, Caifang Gao, Meng-Yu Tsai, Che-Yi Lin, Feng-Shou Yang, Hsin-Ya Sung, Chi Zhang, Wenwu Li, Jun Li, Jianhua Zhang, Kenji Watanabe, Takashi Taniguchi, Keiji Ueno, Kazuhito Tsukagoshi, Ching-Hwa Ho, Junhao Chu, Po-Wen Chiu, Mengjiao Li, Wen-Wei Wu, Yen-Fu Lin
Published: 2023-12-08
Source: Full article
Silicon CMOS-based computing-in-memory encounters design and power challenges, especially in logic-in-memory scenarios requiring nonvolatility and reconfigurability. Here, we report a universal design for nonvolatile reconfigurable devices featuring a 2D/3D heterointegrated configuration. By leveraging the photo-controlled charge trapping/detrapping process and the partially top-gated energy band landscape, the van der Waals heterostacking achieves polarity storage and logic reconfigurable characteristics, respectively. Precise polarity tunability, logic nonvolatility, robustness against high temperature (at 85°C), and near-ideal subthreshold swing (80 mV dec